With the recent increase in high integration degree and high performance of semiconductor devices, further development of custom integrated circuits with several functions, e.g., both analog and digital functions are required. In particular, IC's for multi-media, communications, graphic processing or the like require an analog function in addition to a digital function. To meet this need, enhanced performance of capacitors and resistors are important factors.
In a well-known capacitor for analog function, a thin film of polysilicon or metal is used as a capacitor electrode and a SiO.sub.2 or Si.sub.3 N.sub.4 film is used as a dielectric layer. This capacitor is illustrated in FIG. 1. In this figure, there are two defined regions on a semiconductor substrate 10, i.e., an active region and an inactive region. The capacitor is formed in the inactive region, such as a field oxide layer 12, and a transistor is formed in the active region. The capacitor is provided with a capacitor bottom electrode 16a, a capacitor top electrode 22, and a capacitor dielectric layer 20 interposed therebetween. The transistor is provided with a gate electrode 16b on the active region of substrate 10 with a gate oxide layer 14 interposed therebetween. The transistor is also provided with a source/drain region 18 on both sides of the gate electrode 16b and in the semiconductor substrate 10. An interlayer insulating layer 24 is deposited over the substrate, including the top electrode 22 and the gate electrode 16b. Contact plugs (electrodes) 25, 26 and 27 are formed to electrically connect interconnection electrodes 28, 29 and 30 to structures beneath interlayer insulating layer 24, respectively. If the contact plugs 25, 26, 27 are formed of tungsten (W), they are made of a material different from the aluminum interconnection electrodes. If the contact plugs are formed of aluminum (Al), they are made of the same material as the interconnection electrodes.
In fabrication of the above-mentioned capacitor, a polysilicon layer may generally be used as the capacitor bottom electrode 16a, and an ONO layer having a thickness of several hundred angstroms may be used as the capacitor di electric layer 20. Particularly, the capacitor top electrode 22 is formed with the same material as the gate electrode 16b. The top electrode 22 and the gate electrode 16b are substantially simultaneously formed by depositing a polysilicon layer. Also, in fabrication of the capacitor, so as to reduce a resistance value of the bottom electrode 16a, a thermal treatment process for driving-in impurity ions must be performed after deposition of a polysilicon layer, buffer oxidation and impurity implantation.
On the other hand, in order to improve a signal to noise ratio (SNR) in CMOS logic analog devices, such as analog to digital converters and the like, it is very important to decrease the voltage coefficient of capacitance (VCC) in a CMOS analog capacitor. The decrease in VCC means that the change in capacitance value is low with a voltage applied to the CMOS analog capacitor. If the doping concentration of a lower portion of a capacitor top electrode, i.e., a surface portion nearly adjacent to an interface surface between the capacitor top electrode and a dielectric layer, is similar or identical to that of an upper surface portion of a capacitor bottom electrode, the capacitor may have a far smaller VCC. Also, this capacitor may have a symmetrical characteristic with respect to zero voltage in a C(capacitance)-V(voltage) curve, as shown in FIG. 2. The VCC can be given by following equation: ##EQU1## where C.sub.0 is a nominal capacitance and ##EQU2## is variation of a capacitance to an applied voltage.
However, referring again to FIG. 1, the top and gate electrodes 22 and 16b are simultaneously formed. The gate electrode 16b is doped by a POCl.sub.3 doping/drive-in process, while the bottom electrode 16a is doped by an impurity implantation. The dopant concentration level of the bottom electrode 16a is far lower than that of the gate electrode 22.
Therefore, it is difficult to decrease the VCC of such a capacitor. Such a capacitor also is asymmetric in the C-V curve.
In addition, resistors with high resistance of several hundreds ohm/mm.sup.2 to several Kohm/mm.sup.2 must be designed on a signal chip in which the capacitor is embodied. If the resistors are simultaneously formed with the bottom electrode 16a, the doping concentration of the bottom electrode 16a may be respectively lowered as compared to that of the top electrode 22. This causes serious problems in that the VCC value and asymmetry of the C-V curve characteristic are far more increased.
A need therefore remains for capacitor which can be readily and easily manufactured, and which exhibits a low VCC.